By Johan Huijsing, Michiel Steyaert, Arthur H.M. van Roermund
This 10th quantity of "Analog Circuit layout" concentrates on three subject matters: Scalable Analog Circuits, High-Speed D/A Converters, and RF strength Amplifiers. each one subject is roofed via 6 papers, written via overseas well-known specialists on that subject. those papers have an academic nature aimed toward enhancing the layout of analog circuits. The e-book is split into 3 elements: half I, Scalable Analog Circuit layout describes in 6 papers problems with: scalable high-speed layout, scalable high-resolution mixed-mode ADC and OpAmp layout, scalable high-voltage layout for XDSL, scalability of wire-line entrance ends, reusable IP analog layout, and porting CAD analog layout. half II, High-Speed D/A Converters describes in 6 papers problems with: creation to high-speed D/A converter layout, retargetable 12-bit 200-MHz CMOS present guidance layout, high-speed CMOS D/A converters for upstream cable functions, static and dynamic functionality barriers, the linearity problem of D/A converters for communications, and a 400-MHz, 10-bit charge-domain CMOS D/A converter for low-spurious frequency synthesis. half III, RF energy Amplifiers describes in 6 papers problems with: process points, review and trade-offs, linear transmitter architectures, GaAs microwave SSPAs, Monolithic transformer-coupling in Si-bipolar, and RF strength amplifier layout in CMOS. "Analog Circuit layout" is an important reference resource for analog layout engineers and researchers wishing to maintain abreast with the most recent advancements within the box. the educational insurance additionally makes it appropriate to be used in an develop layout direction.
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Extra info for Analog Circuit Design: Scalable Analog Circuit Design
AN EXAMPLE OF ADSL LINE DRIVER REALIZED IN MIXED BIPOLAR, CMOS, DMOS MIXED TECHNOLOGY. O. (Central Office) is realized by fully complementary high-speed bipolar processes, an example of line driver realized in Multipower BCD (Bipolar, Cmos, Dmos) technology is here reported. The functional diagram is shown in Figure 5. It consists of a differential gain stage followed by a class AB output stage. The input stage is a simple emitter coupled pair where low voltage high speed (ft=7GHz ) npn transistors are used to achieve low input referred noise.
In these technologies, current feedback is very often adopted (see Figure 6). 55 SOI superior characteristics in terms of ft and parasitic capacitances easily allow high small-signal bandwidth and slew rate, while small base resistance (often shown in SOI technologies) and reduced biasing current result in low input voltage and current noise. O. driver realized in SOI are reported in Table 5. Moreover, examples of SOI technologies allowing also the fabrication of accurate laser trimmed analog filters have been recently announced [XX].
31, pp. 312-320, Mar. 1996 23) “Linearity Enhancements of Multi Bit Delta-Sigma D/A and A/D Converters using Data Weighted Averaging” Baird and Fiez, IEEE Trans. Circuits and Systems II, Vol. 42, pp753-762, Dec. 1995 24) “A high Resolution Multi Bit Sigma Delta Modulator with Individual Level Averaging” Chen and Leung, IEEE Jnl. of Solid State Circuits, Vol. 30, pp. 453-460, Apr. 1995 25) “Data-directed Scrambler for Multi-Bit Noise-Shaping D/A Converters, Adams and Kwan, USP 5404142, Apr. 1995 26) “Noise Shaped Multi Bit D/A Converter Employing Unit Elements” Schreier and Zhang, Elec.
Analog Circuit Design: Scalable Analog Circuit Design by Johan Huijsing, Michiel Steyaert, Arthur H.M. van Roermund